The disclosed embodiments relate to a semiconductor device and a semiconductor memory device, and more particularly, to a semiconductor device and a semiconductor memory device including a capacitor, and a layout structure of the devices.
A semiconductor memory device such as a dynamic random access memory (DRAM) includes a core region having a storage for storing data and a peripheral region in which circuits relating to input/output of the data of the core region are arranged. The peripheral region may include unit circuits performing designated functions and a capacitor for supplying a power voltage stably. The capacitor is generally designed to be disposed in a marginal space. However, since semiconductor memory devices are highly integrated and a chip size becomes smaller, a marginal space available for forming the capacitor is reduced.